| CPC G09G 3/20 (2013.01) [G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01)] | 20 Claims |
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1. A display device, comprising:
a pixel array comprising a plurality of pixels connected to a plurality of gate lines and a plurality of source lines; and
a driving circuit configured to:
apply a plurality of gate signals to the plurality of gate lines and provide a plurality of data signals to the plurality of source lines during a first scan period, and
apply the plurality of gate signals to first gate lines, of the plurality of gate lines, connected to pixels in a first area of the pixel array in a different manner from second gate lines, of the plurality of gate lines, connected to pixels in a second area of the pixel array and provide the plurality of data signals to the plurality of source lines for a portion of a second scan period, and maintain a low-biased state or an off state for a remaining portion of the second scan period,
wherein the second scan period is shorter than the first scan period.
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