US 12,288,313 B2
Low-latency architecture for full frequency noise reduction in image processing
YongMei Dong, Beijing (CN); Hui Zhou, Shanghai (CN); ZhongFei Dong, Anhui (CN); and Tsung-Han Chiang, Hsinchu (TW)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US)
Filed on Dec. 24, 2021, as Appl. No. 17/561,865.
Prior Publication US 2023/0206399 A1, Jun. 29, 2023
Int. Cl. G06T 5/70 (2024.01); G06T 1/60 (2006.01); G06T 3/4053 (2024.01); G06T 5/20 (2006.01)
CPC G06T 5/70 (2024.01) [G06T 1/60 (2013.01); G06T 3/4053 (2013.01); G06T 5/20 (2013.01); G06T 2207/10024 (2013.01); G06T 2207/20016 (2013.01); G06T 2207/20221 (2013.01)] 23 Claims
OG exemplary drawing
 
1. A method for denoising an image, the method comprising:
receiving an input image; and
performing a multiscale filtering process on the input image to generate a filtered image, wherein the multiscale filter process includes, for one or more resolution scales of a plurality of different resolution scales;
denoising an image at a different resolution scale of the plurality of different resolution scales to produce a denoised image;
downscaling the denoised image to produce a downscaled image;
upscaling the downscaled image to produce an upscaled image; and
fusing the upscaled imaged with the denoised image.