US 12,288,283 B2
Out-of-order pixel shading and rasterization
Prasoonkumar Surti, Folsom, CA (US); Jorge Garcia Pabon, Folsom, CA (US); and John Gierach, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 24, 2021, as Appl. No. 17/357,403.
Prior Publication US 2022/0414967 A1, Dec. 29, 2022
Int. Cl. G06T 15/00 (2011.01); G06T 1/20 (2006.01); G06T 15/10 (2011.01)
CPC G06T 15/005 (2013.01) [G06T 1/20 (2013.01); G06T 15/10 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A computing system comprising:
a display to present an image; and
a graphics processor coupled to the display, wherein the graphics processor includes logic coupled to one or more substrates, the logic to:
determine that a state of a plurality of primitives is to be associated with out-of-order execution, wherein the plurality of primitives is associated with a raster order;
reorder the plurality of primitives from the raster order;
distribute one or more of pixel processing operations or rasterization operations associated with the plurality of primitives to load balance across one or more of a plurality of execution units of the graphics processor or a graphics pipeline of the graphics processor;
determine a plurality of pixel values associated with the plurality of primitives;
emit a first pixel value of the plurality of pixel values associated with a first pixel location; and
after the first pixel value is emitted, emit a second pixel value of the plurality of pixel values associated with the first pixel location,
wherein the raster order indicates that the second pixel value is to be emitted before the first pixel value.