US 12,287,770 B2
Dynamic random access memory-based content-addressable memory (DRAM-CAM) architecture for exact pattern matching
Lingxi Wu, Charlottesville, VA (US); and Kevin Skadron, Charlottesville, VA (US)
Assigned to University of Virginia Patent Foundation, Charlottesville, VA (US)
Filed by University of Virginia Patent Foundation, Charlottesville, VA (US)
Filed on May 10, 2023, as Appl. No. 18/314,997.
Application 18/314,997 is a continuation in part of application No. 17/462,836, filed on Aug. 31, 2021, granted, now 11,776,594.
Claims priority of provisional application 63/364,444, filed on May 10, 2022.
Prior Publication US 2023/0385258 A1, Nov. 30, 2023
Int. Cl. G06F 16/22 (2019.01); G06F 16/2453 (2019.01); G06F 16/2455 (2019.01)
CPC G06F 16/221 (2019.01) [G06F 16/24532 (2019.01); G06F 16/2455 (2019.01)] 19 Claims
OG exemplary drawing
 
1. A method for processing data using a DRAM-based content-addressable memory (DRAM-CAM) architecture, the method comprising:
obtaining first data, the first data comprising at least one of text or image information, and being organized into a plurality of blocks, each block comprising a plurality of rows;
storing the first data in a memory array of a DRAM-CAM architecture;
converting the first data into a predefined format to form second data, the predefined format characterized by a plurality of columns arranged in an alternating pattern between first groups of columns and seconds group of columns, wherein each first group of columns corresponds to one or more rows of the plurality of rows of the first data, and wherein each second group of columns includes a predetermined number of null columns, wherein the converting comprises, for each block of the plurality of blocks of the first data:
transforming each row of the plurality of rows of the block into one or more columns of the first groups of columns, and
interlacing the first groups of columns with the second group of columns to produce a set of interleaved columns in the second format for the block,
receiving a query, wherein the query indicates a set of search criteria that defines the first data as data to be searched and defines elements to be identified within the first data;
determining an available column of the second groups of columns, wherein the available column is a null column in each of the second groups of columns;
loading raw query data into the available column of each second group of the second groups;
performing pattern matching on the second data to identify occurrences of elements defined by the set of search criteria, wherein the pattern matching is performed concurrently on the first groups of columns using a digital circuit that compares the first groups of columns and the available columns bit by bit, wherein the pattern matching includes accumulating a count of pattern matches and corresponding locations within the memory array; and
outputting results of the pattern matching, wherein the results include the count and the location of each element identified in the second data.