US 12,284,924 B2
Programmable interposer using RRAM platform
Lup San Leong, Singapore (SG); Juan Boon Tan, Singapore (SG); Benfu Lin, Singapore (SG); and Yi Jiang, Singapore (SG)
Assigned to GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore (SG)
Filed by GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore (SG)
Filed on Mar. 18, 2022, as Appl. No. 17/697,974.
Prior Publication US 2023/0301214 A1, Sep. 21, 2023
Int. Cl. H10N 70/00 (2023.01); H10B 63/00 (2023.01)
CPC H10N 70/826 (2023.02) [H10B 63/00 (2023.02); H10N 70/021 (2023.02); H10N 70/8833 (2023.02)] 20 Claims
OG exemplary drawing
 
1. An interposer comprising:
a substrate;
a dielectric layer disposed on the substrate;
a via disposed entirely within the dielectric layer;
a resistive film layer disposed to line the via;
a metal interconnect disposed in the resistive layer lined via; and
a plurality of metal lines disposed in the dielectric layer, the plurality of metal lines including a first metal line connected to the metal interconnect, a second metal line connected to the resistive film layer at a first point, and a third metal line connected to the resistive film layer at a second point.