US 12,284,881 B2
Display device including buffer transistor overlapping with valley area in plan view
Youngjin Cho, Seoul (KR); Jisu Na, Yongin-si (KR); Joong-Soo Moon, Hwaseong-si (KR); and Yangwan Kim, Hwaseong-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by SAMSUNG DISPLAY CO., LTD., Yongin-si (KR)
Filed on Jun. 16, 2023, as Appl. No. 18/336,904.
Application 18/336,904 is a continuation of application No. 17/005,081, filed on Aug. 27, 2020, granted, now 11,683,962.
Claims priority of application No. 10-2019-0171700 (KR), filed on Dec. 20, 2019.
Prior Publication US 2023/0337481 A1, Oct. 19, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H10K 59/124 (2023.01); G09G 3/3266 (2016.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01)
CPC H10K 59/124 (2023.02) [G09G 3/3266 (2013.01); H10K 59/1213 (2023.02); H10K 59/131 (2023.02)] 16 Claims
OG exemplary drawing
 
1. A display device comprising:
a base layer comprising an active area and a non-active area adjacent to the active area;
a display circuit layer comprising a pixel circuit at the active area of the base layer, and a driving circuit at the non-active area, the driving circuit being configured to supply a driving signal to the pixel circuit; and
a display element layer on the display circuit layer and comprising light emitting elements configured to emit light,
wherein:
the driving circuit comprises a buffer transistor configured to output the driving signal,
the display circuit layer comprises a first organic insulation layer, and a second organic insulation layer on the first organic insulation layer,
the non-active area comprises a first valley area formed by removing a portion of the first organic insulation layer, and a second valley area formed by removing a portion of the second organic insulation layer, and
the buffer transistor overlaps with the second valley area in a plan view.