| CPC H10F 39/80373 (2025.01) [H10F 39/014 (2025.01); H10F 39/18 (2025.01)] | 22 Claims |
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1. A transistor formed in a semiconductor substrate, comprising:
a gate trench formed in the semiconductor substrate and extending to a gate trench depth;
a source and a drain formed as doped regions in the semiconductor substrate and having a first conductive type, wherein the source and the drain are formed along a channel length direction of the transistor at a first end and a second end of the gate trench, respectively, wherein the source and the drain each comprises a first doped region and a second doped region extending away from the first doped region, wherein the second doped region extends to a depth in the semiconductor substrate deeper than the first doped region relative to a surface of the semiconductor substrate;
an isolation layer disposed in the gate trench;
a gate disposed on the isolation layer and extending into the gate trench; and
a source isolation region and a drain isolation region formed as doped regions in the semiconductor substrate adjacent to the first doped region and the second doped region of the source and the drain, respectively, wherein the source isolation region and the drain isolation region have a second conductive type, opposite to the first conductive type.
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