US 12,284,833 B2
Semiconductor device and protection circuit including diode and buried wiring
Kazuya Okubo, Yokohama (JP)
Assigned to SOCIONEXT INC., Kanagawa (JP)
Filed by SOCIONEXT INC., Kanagawa (JP)
Filed on Nov. 18, 2021, as Appl. No. 17/529,746.
Application 17/529,746 is a continuation of application No. PCT/JP2019/020476, filed on May 23, 2019.
Prior Publication US 2022/0077138 A1, Mar. 10, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10D 89/60 (2025.01); H10D 84/00 (2025.01)
CPC H10D 89/611 (2025.01) [H10D 89/921 (2025.01); H10D 84/00 (2025.01); H10D 89/811 (2025.01)] 25 Claims
OG exemplary drawing
 
12. A semiconductor device comprising:
a substrate;
a first wiring formed in the substrate;
a second wiring formed in the substrate;
a first circuit region provided with a first power supply wiring, and a first ground wiring;
a second circuit region provided with a second power supply wiring, and a second ground wiring; and
a bidirectional diode connected between the first ground wiring and the second ground wiring, and provided with a first diode and a second diode, wherein:
the first diode includes
a first impurity region of a first conductive type, electrically connected to the second ground wiring, and
a second impurity region of a second conductive type, different from the first conductive type, electrically connected to the first ground wiring,
the second diode includes
a third impurity region of the second conductive type, electrically connected to the second ground wiring, and
a fourth impurity region of the first conductive type, electrically connected to the first ground wiring,
the first impurity region, the second impurity region, the third impurity region, or the fourth impurity region, or any combination of the impurity regions is connected to the first wiring,
one of the first impurity region and the second impurity region is connected to the first wiring,
one of the third impurity region and the fourth impurity region is connected to the second wiring,
the first impurity region, the second impurity region, the third impurity region, and the fourth impurity region are formed in any of a plurality of fins formed on the substrate, and
a number of first fins, of the plurality of fins, connected to the first wiring is less than a number of second fins adjacent to the first fins.