US 12,284,803 B2
System and methods for dram contact formation
Nicolas Louis Breil, San Jose, CA (US); Fredrick Fishburn, Aptos, CA (US); and Byeong Chan Lee, San Jose, CA (US)
Assigned to APPLIED MATERIALS, INC., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Mar. 7, 2022, as Appl. No. 17/688,602.
Claims priority of provisional application 63/176,790, filed on Apr. 19, 2021.
Prior Publication US 2022/0336469 A1, Oct. 20, 2022
Int. Cl. H01L 27/108 (2006.01); H10B 12/00 (2023.01)
CPC H10B 12/485 (2023.02) 20 Claims
OG exemplary drawing
 
1. A method of forming a dynamic random access memory (DRAM) device, comprising:
forming a plurality of bit line contact regions in an array on the DRAM device, wherein forming each of the bit line contact regions comprises:
forming a plurality of source/drain contact regions;
depositing a doped semiconductor layer on a first doped region while depositing the doped semiconductor layer on each of the source/drain contact regions, the first doped region exposed through a trench in a dielectric material formed over the first doped region on a substrate;
depositing a metal silicide layer over the doped semiconductor layer; and
forming a nitride layer over the metal silicide layer, wherein the doped semiconductor layer, the metal silicide layer, and the nitride layer are formed in a single processing system without breaking vacuum, the single process system including a plurality of process chambers,
wherein the doped semiconductor layer comprising a silicon layer doped with carbon only, the carbon having a concentration of about 5×1021 atoms/cm3 or less.