| CPC H10B 12/01 (2023.02) [G11C 11/4085 (2013.01); G11C 11/4091 (2013.01)] | 25 Claims |

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1. A microelectronic device, comprising:
array regions individually comprising:
memory cells comprising access devices and storage node devices;
digit lines coupled to the access devices and extending in a first direction; and
word lines coupled to the access devices and extending in a second direction orthogonal to the first direction;
word line exit regions horizontally alternating with the array regions in the second direction; and
sub word line driver sections vertically overlying and horizontally overlapping the word line exit regions, the sub word line driver sections including sub word line driver circuitry in electrical communication with the word lines by way of routing structures substantially confined within horizontal boundaries of the word line exit regions.
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