| CPC H04W 8/22 (2013.01) [H04W 8/005 (2013.01); H04W 88/06 (2013.01); H04W 88/08 (2013.01)] | 20 Claims |

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1. A processor comprising:
an interface configured to receive and provide signals; and
a processing circuit coupled to the interface and configured to:
send, to the interface, assistance information for transmission to a base station, wherein the assistance information comprises a preferred K0 value associated with a preferred time difference between transmission of a physical downlink control channel (PDCCH) and a physical downlink shared channel (PDSCH); and
receive, via the interface, a configuration for a signaled K0 value, wherein the signaled K0 value is associated with a signaled time difference between transmission of the PDCCH and the PDSCH.
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