US 12,284,003 B2
Phase and amplitude error correction in a transmission circuit
Nadim Khlat, Cugnaux (FR)
Assigned to Qorvo US, Inc., Greensboro, NC (US)
Filed by Qorvo US, Inc., Greensboro, NC (US)
Filed on Sep. 7, 2022, as Appl. No. 17/939,350.
Claims priority of provisional application 63/245,151, filed on Sep. 16, 2021.
Claims priority of provisional application 63/245,147, filed on Sep. 16, 2021.
Prior Publication US 2023/0080621 A1, Mar. 16, 2023
Int. Cl. H04B 7/005 (2006.01); H04B 1/40 (2015.01); H04L 25/03 (2006.01)
CPC H04B 7/005 (2013.01) [H04B 1/40 (2013.01); H04L 25/03261 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A transceiver circuit comprising:
a digital processing circuit configured to generate an input vector modulated across a modulation bandwidth comprising a plurality of modulation frequencies, the input vector is associated with a plurality of time-variant amplitudes and a plurality of time-variant group delays each corresponding to a respective one of the plurality of modulation frequencies;
a frequency equalizer circuit configured to apply a frequency equalization filter to the input vector to thereby modify the plurality of time-variant amplitudes and the plurality of time-variant group delays and generate a frequency-equalized input vector associated with:
an equalized time-variant amplitude that is identical in each of the plurality of modulation frequencies; and
an equalized time-variant group delay that is identical in each of the plurality of modulation frequencies and
a phase correction circuit configured to:
determine, based on the frequency-equalized input vector, a phase correction term configured to correct a phase error caused by the equalized time-variant group delay in a selected one of the plurality of modulation frequencies; and
apply the determined phase correction term to the frequency-equalized input vector to generate a frequency-phase-equalized signal corresponding to the selected one of the plurality of modulation frequencies.