US 12,283,971 B2
Flash memory apparatus and storage management method for flash memory
Tsung-Chieh Yang, Hsinchu (TW); and Hong-Jung Hsu, Hsinchu County (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on Jan. 15, 2024, as Appl. No. 18/413,007.
Application 18/413,007 is a continuation of application No. 17/676,853, filed on Feb. 22, 2022, granted, now 11,916,569.
Application 17/676,853 is a continuation of application No. 16/896,210, filed on Jun. 9, 2020, granted, now 11,323,133, issued on May 3, 2022.
Application 16/896,210 is a continuation of application No. 16/251,033, filed on Jan. 17, 2019, granted, now 10,771,091, issued on Sep. 8, 2020.
Application 16/251,033 is a continuation of application No. 15/495,992, filed on Apr. 25, 2017, granted, now 10,236,908, issued on Mar. 19, 2019.
Claims priority of provisional application 62/328,025, filed on Apr. 27, 2016.
Claims priority of application No. 106106328 (TW), filed on Feb. 24, 2017.
Prior Publication US 2024/0154624 A1, May 9, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H03M 13/00 (2006.01); G06F 11/10 (2006.01); G11C 11/56 (2006.01); G11C 16/10 (2006.01); H03M 13/09 (2006.01); H03M 13/15 (2006.01); G11C 16/26 (2006.01)
CPC H03M 13/098 (2013.01) [G06F 11/1072 (2013.01); G06F 11/108 (2013.01); G11C 11/5628 (2013.01); G11C 16/10 (2013.01); H03M 13/1515 (2013.01); H03M 13/611 (2013.01); G11C 16/26 (2013.01); G11C 2211/5641 (2013.01)] 5 Claims
OG exemplary drawing
 
1. A method for accessing a flash memory module, wherein the flash memory module comprises a plurality of first blocks and at least one second block, and the method comprises the steps of:
classifying data into a plurality of groups;
performing an error code encoding operation on the groups of data to generate corresponding parity check code;
writing the groups of data and the corresponding parity check code into the plurality of first blocks of the flash memory module according to a randomizer seed rule of the at least one second block; and
after the groups of data are written into the plurality of first blocks, writing the groups of data and corresponding parity check code from the plurality of first blocks to the at least one second block.