US 12,283,631 B2
Method of manufacturing a semiconductor device and a semiconductor device
Shahaji B. More, Hsinchu (TW); and Chun Hsiung Tsai, Xinpu Township (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 9, 2024, as Appl. No. 18/437,625.
Application 18/437,625 is a continuation of application No. 17/740,097, filed on May 9, 2022, granted, now 11,942,552.
Application 17/740,097 is a continuation of application No. 16/940,312, filed on Jul. 27, 2020, granted, now 11,329,163, issued on May 10, 2022.
Prior Publication US 2024/0250175 A1, Jul. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 21/823864 (2013.01); H01L 21/823878 (2013.01); H01L 27/092 (2013.01); H01L 29/0653 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first gate-all-around field effect transistor (GAA FET) and a second GAA FET, wherein the first GAA FET and the second GAA FET include at least semiconductor wires or sheets and a source/drain epitaxial layer;
a wall fin disposed between the first GAA FET and the second GAA FET, wherein the wall fin includes a first dielectric layer, a second dielectric layer disposed over the first dielectric layer and a third dielectric layer; and
a fourth dielectric layer disposed on the source/drain epitaxial layer.