US 12,283,630 B2
Epitaxial source/drain structures for multigate devices and methods of fabricating thereof
Chen-Ming Lee, Yangmei (TW); I-Wen Wu, Hsinchu (TW); Po-Yu Huang, Hsinchu (TW); Fu-Kai Yang, Hsinchu (TW); and Mei-Yun Wang, Hsin-Chu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Nov. 29, 2023, as Appl. No. 18/523,214.
Application 18/523,214 is a continuation of application No. 17/383,989, filed on Jul. 23, 2021, granted, now 11,876,135.
Claims priority of provisional application 63/142,886, filed on Jan. 28, 2021.
Prior Publication US 2024/0097035 A1, Mar. 21, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/7848 (2013.01) [H01L 27/1266 (2013.01); H01L 27/127 (2013.01); H01L 29/78621 (2013.01); H01L 27/1218 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/785 (2013.01); H01L 29/78603 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a source/drain recess that extends a depth into a substrate;
epitaxially growing a first semiconductor layer having a first dopant concentration in the source/drain recess, wherein the first semiconductor layer is disposed along sidewalls and a bottom of the source/drain recess, wherein a thickness of the first semiconductor layer along the bottom of the source/drain recess is less than the depth;
epitaxially growing a second semiconductor layer in the source/drain recess and over the first semiconductor layer, wherein the second semiconductor layer has a second dopant concentration greater than the first dopant concentration; and
etching the substrate and the first semiconductor layer to expose a backside of the second semiconductor layer.