CPC H01L 29/66545 (2013.01) [H01L 21/02359 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/0262 (2013.01); H01L 21/02645 (2013.01); H01L 21/02664 (2013.01); H01L 21/32055 (2013.01); H01L 21/32137 (2013.01); H01L 21/823821 (2013.01); H01L 21/823864 (2013.01); H01L 27/0924 (2013.01); H01L 29/66795 (2013.01)] | 20 Claims |
1. A method of forming a semiconductor device comprising:
depositing a dielectric layer over a semiconductor fin;
depositing a dummy gate seed layer on the dielectric layer;
reflowing the dummy gate seed layer, wherein the reflowing the dummy gate seed layer decreases a first thickness of the dummy gate seed layer on a top surface of the semiconductor fin exposing a first portion of the dielectric layer and increases a second thickness of the dummy gate seed layer adjacent a second portion of the dielectric layer; and
etching the first portion of the dielectric layer, wherein the etching the dielectric layer forms a halogen-terminated surface in the first portion of the dielectric layer, wherein the second portion of the dielectric layer is not etched and is free from the halogen-terminated surface.
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