US 12,283,609 B2
Gate structure of transistor including a plurality of work function layers and oxygen device and method
Hsin-Yi Lee, Hsinchu (TW); Ji-Cheng Chen, Hsinchu (TW); and Chi On Chui, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jan. 29, 2024, as Appl. No. 18/425,895.
Application 18/425,895 is a continuation of application No. 17/841,217, filed on Jun. 15, 2022, granted, now 11,923,414.
Application 17/841,217 is a continuation of application No. 17/198,650, filed on Mar. 11, 2021, granted, now 11,411,079, issued on Aug. 9, 2022.
Claims priority of provisional application 63/139,983, filed on Jan. 21, 2021.
Prior Publication US 2024/0170536 A1, May 23, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/06 (2006.01); H01L 21/02 (2006.01)
CPC H01L 29/0673 (2013.01) [H01L 21/02631 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a first channel region structure and a second channel region structure over a substrate; and
depositing a gate dielectric on the first channel region structure and the second channel region structure;
depositing a first p-type work function metal on the gate dielectric, wherein a first portion of the first p-type work function metal surrounds the first channel region structure, wherein a second portion of the first p-type work function metal surrounds the second channel region structure;
increasing an oxygen concentration at an interface between the first p-type work function metal and the gate dielectric by performing an oxygen exposure process on the first p-type work function metal;
depositing a second p-type work function metal on the first p-type work function metal; and
increasing an oxygen concentration at an interface between the second p-type work function metal and the first p-type work function metal by performing an oxygen exposure process on the second p-type work function metal.