US 12,283,607 B2
3D inductor design using bundle substrate vias
Jonghae Kim, San Diego, CA (US); Je-Hsiung Lan, San Diego, CA (US); and Ranadeep Dutta, Del Mar, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Jun. 16, 2021, as Appl. No. 17/349,724.
Prior Publication US 2022/0406882 A1, Dec. 22, 2022
Int. Cl. H01F 27/28 (2006.01); H01F 17/00 (2006.01); H01L 21/768 (2006.01); H01L 23/48 (2006.01); H01L 23/66 (2006.01); H01L 49/02 (2006.01); H01P 3/08 (2006.01); H01P 11/00 (2006.01)
CPC H01L 28/10 (2013.01) [H01F 17/0006 (2013.01); H01F 27/2804 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 23/66 (2013.01); H01P 3/08 (2013.01); H01P 11/003 (2013.01); H01F 2017/004 (2013.01); H01L 2223/6627 (2013.01); H01L 2223/6672 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A three dimensional (3D) inductor, comprising:
a first plurality of micro-through substrate vias (TSVs) within a first area of a substrate, each micro-TSV having a diameter of less than twenty micrometers, the first plurality of micro-TSVs arranged in multiple columns and multiple rows, the first area of the substrate corresponding to a macro-TSV opening of the substrate having a diameter of more than eighty micrometers;
a first trace on a first surface of the substrate, coupled to a first end of the first plurality of micro-TSVs; and
a second trace on a second surface of the substrate, opposite the first surface, coupled to a second end, opposite the first end, of the first plurality of micro-TSVs.