US 12,283,603 B2
Imaging element and distance measurement module
Hideki Arai, Kanagawa (JP); Yusuke Otake, Kanagawa (JP); Takuro Murase, Kanagawa (JP); and Takeshi Yamazaki, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/792,814
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Jan. 18, 2021, PCT No. PCT/JP2021/001414
§ 371(c)(1), (2) Date Jul. 14, 2022,
PCT Pub. No. WO2021/153299, PCT Pub. Date Aug. 5, 2021.
Claims priority of application No. 2020-012437 (JP), filed on Jan. 29, 2020.
Prior Publication US 2023/0038698 A1, Feb. 9, 2023
Int. Cl. H01L 27/146 (2006.01); G01S 7/4914 (2020.01); G01S 7/4915 (2020.01); H04N 25/704 (2023.01)
CPC H01L 27/14636 (2013.01) [G01S 7/4914 (2013.01); G01S 7/4915 (2013.01); H01L 27/14638 (2013.01); H04N 25/704 (2023.01)] 10 Claims
OG exemplary drawing
 
1. An imaging element, comprising:
a first wiring that connects predetermined transistors in first adjacent pixels to a via formed in one of the first adjacent pixels and connected to a wiring formed in another layer; and
a second wiring that connects predetermined transistors in second adjacent pixels to a via formed in a pixel that is adjacent to one of the second adjacent pixels and connected to a wiring formed in another layer,
wherein the first wiring is connected to a redundant wiring.