	US 12,283,591 B2
	Integrated circuit device
Huaixin Xian, Hsinchu (TW); Yang Zhou, Hsinchu (TW); and Qingchao Meng, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); and TSMC NANJING COMPANY, LIMITED, Nanjing (CN)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); and TSMC NANJING COMPANY, LIMITED, Jiangsu (CN)
Filed on Nov. 27, 2023, as Appl. No. 18/519,460.
Application 18/519,460 is a continuation of application No. 17/338,038, filed on Jun. 3, 2021, granted, now 11,862,621.
Claims priority of application No. 202110549726.0 (CN), filed on May 20, 2021.
Prior Publication US 2024/0088129 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/528 (2006.01); G06F 30/392 (2020.01); H01L 21/8238 (2006.01); H01L 27/02 (2006.01); H01L 27/092 (2006.01); G06F 119/12 (2020.01)

CPC H01L 27/0207 (2013.01) [G06F 30/392 (2020.01); H01L 21/823871 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); G06F 2119/12 (2020.01)]

20 Claims

1. An integrated circuit (IC) device, comprising:

at least one circuit comprising:

an input and an output, and

a plurality of transistors electrically coupled with each other between the input and the output; and

an output connector electrically coupled to the output,

wherein

the output is in a first metal layer, and

the output connector comprises:

a first conductive pattern in the first metal layer, and

a second conductive pattern in a second metal layer different from the first metal layer, the second conductive pattern electrically coupling the output to the first conductive pattern.

11. An integrated circuit (IC) device, comprising:

a first active region of a first semiconductor type, wherein

the first active region extends discontinuously along a first axis, and

the first active region comprises first and second portions spaced from each other along the first axis;

a second active region of a second semiconductor type different from the first semiconductor type, wherein

the second active region extends continuously along the first axis, and

the second active region overlaps, along a second axis transverse to the first axis, the first and second portions of the first active region and a spacing between the first and second portions of the first active region; and

a plurality of gate electrodes extending along the second axis and across the first and second active regions.

18. An integrated circuit (IC) device, comprising:

a first active region of a first semiconductor type and extending along a first axis;

a second active region of a second semiconductor type different from the first semiconductor type, and extending along the first axis; and

at least one gate electrode extending along a second axis transverse to the first axis, and across the first and second active regions,

wherein

the at least one gate electrode and the first active region are configured as a first transistor of a first type,

the at least one gate electrode and the second active region are configured as a second transistor of a second type different from the first type, and

the IC device further comprises, in or over the first active region, a structure configured to change a stress on the first active region to increase a threshold voltage of the first transistor.