US 12,283,569 B2
Semiconductor device package and a method of manufacturing the same
Yung-Hsing Chang, Kaohsiung (TW); and Wen-Hsin Lin, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Feb. 21, 2023, as Appl. No. 18/112,463.
Application 18/112,463 is a continuation of application No. 15/960,416, filed on Apr. 23, 2018, granted, now 11,587,903.
Prior Publication US 2023/0207521 A1, Jun. 29, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 23/552 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 21/561 (2013.01); H01L 23/3121 (2013.01); H01L 23/552 (2013.01); H01L 25/50 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A semiconductor device package, comprising:
a first substrate having a first surface and a second surface opposite to the first surface;
a second substrate disposed over the first surface of the first substrate; and
an encapsulant covering the first surface and the second surface of the first substrate,
wherein a portion of the second surface of the first substrate is exposed from the encapsulant,
wherein the encapsulant includes a first portion disposed in a gap between the first surface of the first substrate and a lower surface of the second substrate, wherein the gap vertically overlaps the first substrate and the second substrate in a cross-sectional view,
wherein the first substrate has a first lateral surface substantially aligned with a lateral surface of the second substrate.