US 12,283,567 B2
Method of manufacturing semiconductor device having air cavity
Hsih-Yang Chiu, Taoyuan (TW)
Assigned to NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed by NANYA TECHNOLOGY CORPORATION, New Taipei (TW)
Filed on Mar. 14, 2024, as Appl. No. 18/604,804.
Application 18/604,804 is a division of application No. 17/715,272, filed on Apr. 7, 2022, granted, now 12,148,731.
Prior Publication US 2024/0222317 A1, Jul. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/82 (2013.01) [H01L 2224/82002 (2013.01); H01L 2224/82101 (2013.01); H01L 2224/82106 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a first dielectric layer over a substrate;
forming a sacrificial pattern on a top surface of the first dielectric layer;
forming an RDL on the top surface of the first dielectric layer and the sacrificial pattern, wherein a top surface and two side surfaces of the sacrificial pattern are in contact with the RDL, such that the sacrificial pattern is enclosed in the RDL; and
removing the sacrificial pattern to form an air cavity enclosed within the RDL, wherein a top surface and two side surfaces of the air cavity are defined and enclosed by the RDL.