US 12,283,556 B2
Package structure
Chen-Hua Yu, Hsinchu (TW); Chun-Hui Yu, Hsinchu County (TW); and Kuo-Chung Yee, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jan. 23, 2024, as Appl. No. 18/420,686.
Application 18/420,686 is a division of application No. 17/378,796, filed on Jul. 19, 2021, granted, now 11,916,028.
Application 17/378,796 is a continuation of application No. 16/714,814, filed on Dec. 16, 2019, granted, now 11,069,636, issued on Jul. 20, 2021.
Application 16/714,814 is a continuation of application No. 16/219,981, filed on Dec. 14, 2018, granted, now 10,510,695, issued on Dec. 17, 2019.
Application 16/219,981 is a continuation of application No. 15/662,279, filed on Jul. 27, 2017, granted, now 10,157,864, issued on Dec. 18, 2018.
Prior Publication US 2024/0170419 A1, May 23, 2024
Int. Cl. H01L 23/48 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/02 (2013.01) [H01L 23/3114 (2013.01); H01L 23/3128 (2013.01); H01L 24/12 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 25/065 (2013.01); H01L 24/48 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02379 (2013.01); H01L 2224/024 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/18 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/48464 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/10252 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/10329 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1304 (2013.01); H01L 2924/1433 (2013.01); H01L 2924/181 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a die;
an encapsulant, encapsulating sidewalls of the die; and
a redistribution layer structure, disposed on the die and the encapsulant, wherein the RDL structure comprises:
a first dielectric structure comprising a first dielectric material layer and a second dielectric material layer on the first dielectric material layer; and
a first redistribution layer, embedded in the first dielectric structure and electrically connected to the die, wherein the first redistribution layer comprises a first seed layer and a first conductive layer surrounded by the first seed layer,
wherein the first seed layer and the first conductive layer form a first trace and a first via, the first trace is embedded in the second dielectric material layer and the first via penetrates through the second dielectric material layer and the first dielectric material layer, the first via has a first sidewall in the first dielectric material layer and a second sidewall in the second dielectric material layer, and a terminal of the first sidewall at an interface of the first dielectric material layer and the second dielectric material layer is a terminal of the second sidewall.