US 12,283,552 B2
Extended seal ring structure on wafer-stacking
Shih-Hsorng Shen, Hsinchu (TW); and Kuan-Hsien Lee, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 25, 2022, as Appl. No. 17/872,809.
Application 17/872,809 is a division of application No. 17/150,871, filed on Jan. 15, 2021, granted, now 11,894,319.
Claims priority of provisional application 63/058,623, filed on Jul. 30, 2020.
Prior Publication US 2022/0359429 A1, Nov. 10, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/58 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/562 (2013.01) [H01L 21/78 (2013.01); H01L 23/564 (2013.01); H01L 23/585 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/3511 (2013.01)] 20 Claims
OG exemplary drawing
 
8. A package device comprising:
a first die comprising a first seal ring surrounding a periphery thereof;
a second die comprising a second seal ring surrounding a periphery thereof; and
a third seal ring spanning an interface between the first die and the second die, the third seal ring surrounding the interface and sealing the interface within the third seal ring, the third seal ring being a homogeneous structure extending through the interface between the first die and the second die, wherein a first horizontal line parallel with the interface intersects the third seal ring and the first seal ring, wherein a second horizontal line parallel with the interface intersects the third seal ring and the second seal ring.