US 12,283,546 B2
Integrated circuit and method for forming the same
Shih-Wei Peng, Hsinchu (TW); Wei-Cheng Lin, Hsinchu (TW); Cheng-Chi Chuang, Hsinchu (TW); and Jiann-Tyng Tzeng, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Apr. 20, 2023, as Appl. No. 18/304,304.
Application 18/304,304 is a continuation of application No. 17/142,016, filed on Jan. 5, 2021, granted, now 11,637,066.
Claims priority of provisional application 63/018,091, filed on Apr. 30, 2020.
Prior Publication US 2023/0253325 A1, Aug. 10, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 23/5286 (2013.01) [H01L 21/76895 (2013.01); H01L 23/5226 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit, comprising:
a strip structure having a front side and a back side, wherein the strip structure comprises a dielectric material;
a gate structure on the front side of the strip structure, wherein a bottommost surface of the gate structure is below a topmost surface of the strip structure;
an isolation structure surrounding the strip structure;
a backside via in the isolation structure;
a contact over the strip structure, wherein a first portion of the contact extends into the isolation structure and contacts the backside via; and
a backside power rail on the back side of the strip structure and in contact with the backside via.