US 12,283,543 B2
Semiconductor packages
Jie Chen, New Taipei (TW); Hsien-Wei Chen, Hsinchu (TW); and Ming-Fa Chen, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 23, 2023, as Appl. No. 18/518,448.
Application 18/518,448 is a continuation of application No. 16/876,111, filed on May 17, 2020, granted, now 11,854,967.
Claims priority of provisional application 62/893,784, filed on Aug. 29, 2019.
Prior Publication US 2024/0088028 A1, Mar. 14, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/522 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/5227 (2013.01) [H01L 23/3157 (2013.01); H01L 23/5226 (2013.01); H01L 24/05 (2013.01); H01L 25/0657 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a die, comprising a device; and
a plurality of conductive patterns over the device, wherein the conductive patterns are electrically connected to one another to form a first coil and a second coil surrounding the first coil, wherein the first coil has a first total height extended along a stacking direction of the device and the conductive patterns, the second coil has a second total height along the stacking direction, and the second total height is different from the first total height.