US 12,283,532 B2
Semiconductor structure and method of manufacture
Yao-Te Huang, Hsinchu (TW); and Liang-Chor Chung, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 18, 2022, as Appl. No. 17/866,807.
Application 17/866,807 is a division of application No. 16/888,177, filed on May 29, 2020, granted, now 11,443,991.
Prior Publication US 2022/0352043 A1, Nov. 3, 2022
Int. Cl. H01L 21/66 (2006.01); H01L 21/768 (2006.01)
CPC H01L 22/34 (2013.01) [H01L 21/76813 (2013.01); H01L 21/7684 (2013.01); H01L 21/76895 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first pad over a substrate, the first pad comprising:
an outer frame, the outer frame comprising a conductive material;
a panel region surrounded by the outer frame, the panel region being a continuous electrically conductive region; and
a conductive grid between the outer frame and the panel region;
an active device over the substrate, wherein a bottom surface of the panel region extends below a top surface of the active device; and
a plurality of dielectric regions, wherein each dielectric region of the plurality of dielectric regions is surrounded by conductive material of the conductive grid, the panel region, or the outer frame, and wherein a first dielectric region of the plurality of dielectric regions has a first length and a first width in a top view, the first length being greater than the first width.