US 12,283,527 B2
Methods of forming semiconductor device structures
Yu-Lien Huang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Jun. 4, 2022, as Appl. No. 17/832,576.
Claims priority of provisional application 63/310,742, filed on Feb. 16, 2022.
Prior Publication US 2023/0260850 A1, Aug. 17, 2023
Int. Cl. H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/417 (2006.01)
CPC H01L 21/823871 (2013.01) [H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 27/0924 (2013.01); H01L 29/41791 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming fins from a substrate;
forming a gate stack over portions of the fins;
forming an epitaxial source/drain region adjacent the gate stack;
depositing a dielectric layer over the epitaxial source/drain region;
forming an opening in the dielectric layer;
forming a gapfill in the opening in a bottom-up fashion, wherein the gapfill comprises Si or W;
forming a conductive feature over the epitaxial source/drain region; and
replacing the gapfill with a dielectric material.