US 12,283,517 B2
Method for forming semiconductor structure
Pengchong Li, Shanghai (CN); Xuejie Shi, Shanghai (CN); Hansu Oh, Shanghai (CN); and Bo Su, Shanghai (CN)
Assigned to Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai (CN); and Semiconductor Manufacturing International (Beijing) Corporation, Beijing (CN)
Filed by Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai (CN); and Semiconductor Manufacturing International (Beijing) Corporation, Beijing (CN)
Filed on Nov. 8, 2021, as Appl. No. 17/520,967.
Claims priority of application No. 202011506507.6 (CN), filed on Dec. 18, 2020.
Prior Publication US 2022/0199460 A1, Jun. 23, 2022
Int. Cl. H10D 30/43 (2025.01); H01L 21/265 (2006.01); H01L 21/762 (2006.01); H10D 30/01 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H01L 21/76237 (2013.01) [H01L 21/26513 (2013.01); H10D 30/024 (2025.01); H10D 64/017 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 18 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
providing a base, comprising:
an isolation region corresponding to a fin cut position,
a substrate and a fin protruding from the substrate, the fin being a continuous structure,
a dummy gate structure extending across the fin formed on the substrate,
a source-drain doped region formed in the fin on two sides of the dummy gate structure, and
an interlayer dielectric layer covering a side wall of the dummy gate structure, where the source-drain doped region is formed on the substrate;
removing the dummy gate structure located at the isolation region, to form an isolation opening, to expose a top and a side wall of the fin located at the isolation region;
performing first ion doping on the fin below the isolation opening, to form an isolation doped region in the fin, wherein a doping type of the isolation doped region is different from a doping type of the source-drain doped region;
filling an isolation structure in the isolation opening after the first ion doping is performed, wherein the isolation structure extends across the fin of the isolation region;
removing the remaining dummy gate structure after the isolation structure is formed, to form a gate opening in the interlayer dielectric layer; and
forming a gate structure in the gate opening; and
after the gate structure is formed, performing a second heat treatment on the isolation doped region.