US 12,283,485 B2
Cut metal gate refill with void
Ting-Gang Chen, Taipei (TW); Wan-Hsien Lin, Hsinchu (TW); Chieh-Ping Wang, Taichung (TW); Tai-Chun Huang, Hsinchu (TW); and Chi On Chui, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 25, 2022, as Appl. No. 17/872,623.
Application 17/872,623 is a division of application No. 16/837,607, filed on Apr. 1, 2020, granted, now 11,532,479.
Prior Publication US 2022/0359206 A1, Nov. 10, 2022
Int. Cl. H01L 27/088 (2006.01); H01L 21/28 (2006.01); H01L 21/764 (2006.01); H01L 21/8238 (2006.01); H01L 23/535 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01)
CPC H01L 21/28123 (2013.01) [H01L 21/764 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823871 (2013.01); H01L 21/823878 (2013.01); H01L 23/535 (2013.01); H01L 27/0924 (2013.01); H01L 29/0653 (2013.01); H01L 29/66545 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A device comprising:
a first Fin Field Effect Transistor (FinFET) comprising a first fin extending from a substrate and having a longitudinal axis extending in a first direction, a first source/drain region disposed in the first fin, a first isolation region surrounding a lower portion of the first fin, and a first gate electrode over and perpendicular to the first fin and over the first isolation region;
a second FinFET comprising a second fin extending from the substrate and having a longitudinal axis extending in the first direction, a second source/drain region disposed in the second fin, a second isolation region surrounding a lower portion of the second fin, and a second gate electrode over and perpendicular to the second fin and over the second isolation region, the second FinFET being adjacent the first FinFET, the first gate electrode being in line with the second gate electrode; and
a dielectric region disposed between the first gate electrode and the second gate electrode, the first gate electrode electrically isolated from the second gate electrode by the dielectric region, the dielectric region comprising a first dielectric material and an air gap disposed within the first dielectric material, the dielectric region extending at least halfway into the second isolation region, wherein the dielectric region has a first width, in a second direction perpendicular to the first direction, at a first point above a topmost surface of the first isolation region, and the dielectric region has a second width greater than the first width in the second direction, at a second point below the topmost surface of the first isolation region.