US 12,283,482 B2
Thin wafer process for improved crystal utilization of wide bandgap devices
Vipindas Pala, San Jose, CA (US); and Sudarsan Uppili, Portland, OR (US)
Assigned to Monolithic Power Systems, Inc., San Jose, CA (US)
Filed by MONOLITHIC POWER SYSTEMS, INC., San Jose, CA (US)
Filed on Mar. 22, 2022, as Appl. No. 17/701,088.
Claims priority of provisional application 63/175,477, filed on Apr. 15, 2021.
Prior Publication US 2022/0336215 A1, Oct. 20, 2022
Int. Cl. H01L 21/02 (2006.01); H10D 12/01 (2025.01); H10D 30/01 (2025.01); H10D 62/832 (2025.01)
CPC H01L 21/02378 (2013.01) [H01L 21/02529 (2013.01); H10D 12/031 (2025.01); H10D 62/8325 (2025.01); H10D 30/025 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method of fabricating a wide bandgap device, the method comprising:
providing a native substrate of silicon carbide;
growing an epitaxial layer of silicon carbide on a first surface of the native substrate;
after growing the epitaxial layer, attaching a handle substrate of silicon to a second surface of the native substrate, the second surface being opposite the first surface;
fabricating a wide bandgap device in the epitaxial layer, the fabrication of the wide bandgap device having a thermal budget that does not exceed 1300° C.; and
after fabricating the wide bandgap device, detaching the handle substrate from the native substrate.