US 12,283,339 B2
Data transmission circuit and memory device
Xianjun Wu, Hefei (CN); Weibing Shang, Hefei (CN); and Xiaoqing Shi, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Appl. No. 17/796,745
Filed by ChangXin Memory Technologies, Inc., Hefei (CN)
PCT Filed Apr. 18, 2022, PCT No. PCT/CN2022/087372
§ 371(c)(1), (2) Date Aug. 1, 2022,
PCT Pub. No. WO2023/019988, PCT Pub. Date Feb. 23, 2023.
Claims priority of application No. 202110963315.6 (CN), filed on Aug. 20, 2021.
Prior Publication US 2024/0265952 A1, Aug. 8, 2024
Int. Cl. G11C 7/08 (2006.01); G11C 7/10 (2006.01)
CPC G11C 7/08 (2013.01) [G11C 7/1096 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A data transmission circuit, comprising:
a sense amplifier circuit, wherein the sense amplifier circuit generates an amplified signal based on a signal at a first terminal and a signal at a second terminal;
a first sub-discharge path, electrically connected to the first terminal and a first data line, wherein the first sub-discharge path discharges from the first terminal to a discharge terminal based on a signal of the first data line in a read state;
a second sub-discharge path, electrically connected to the second terminal and configured to receive a discharge adjustment signal, wherein the second sub-discharge path discharges from the second terminal to the discharge terminal based on the discharge adjustment signal in the reading state; and
a discharge adjustment unit, wherein the discharge adjustment unit is not electrically connected to the first sub-discharge path but is electrically connected to the second sub-discharge path and configured to receive a control signal, wherein the discharge adjustment unit generates the discharge adjustment signal based on the control signal to adjust a discharge capacity of the second sub-discharge path;
wherein the control signal comprises a first sub-control signal, wherein the discharge adjustment signal comprises a first sub-discharge adjustment signal; wherein the discharge adjustment unit comprises:
a first sub-discharge adjustment circuit, electrically connected to a first terminal of the second sub-discharge path and configured to receive the first sub-control signal, wherein the first sub-discharge adjustment circuit provides the first sub-discharge adjustment signal to the second sub-discharge path based on the first sub-control signal;
wherein the control signal further comprises a second sub-control signal, the discharge adjustment signal further comprises a second sub-discharge adjustment signal; and wherein the discharge adjustment unit further comprises:
a second sub-discharge adjustment circuit, electrically connected to a second terminal of the second sub-discharge path and configured to receive the second sub-control signal, wherein the second sub-discharge adjustment circuit is configured to provide the second sub-discharge adjustment signal to the second sub-discharge path based on the second sub-control signal;
wherein the first sub-discharge adjustment circuit comprises:
a first transistor, wherein a source of the first transistor is electrically connected to a first voltage, and a gate is configured to receive the first sub-control signal;
a second transistor, wherein a source of the second transistor is electrically connected to a second voltage, a drain is electrically connected to the drain of the first transistor and the first terminal of the second sub-discharge path, and a gate is configured to receive the first sub-control signal; and
a first energy storage unit, electrically connected to both the drain of the first transistor and the drain of the second transistor.