US 12,283,327 B2
Semiconductor memory device
Naoya Tokiwa, Fujisawa Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on May 13, 2024, as Appl. No. 18/662,971.
Application 18/662,971 is a continuation of application No. 18/359,764, filed on Jul. 26, 2023, granted, now 12,020,753.
Application 18/359,764 is a continuation of application No. 18/148,022, filed on Dec. 29, 2022, granted, now 11,756,627, issued on Sep. 12, 2023.
Application 18/148,022 is a continuation of application No. 17/387,765, filed on Jul. 28, 2021, granted, now 11,594,282, issued on Feb. 28, 2023.
Application 17/387,765 is a continuation of application No. 17/060,953, filed on Oct. 1, 2020, granted, now 11,094,380, issued on Aug. 17, 2021.
Application 17/060,953 is a continuation of application No. 16/856,679, filed on Apr. 23, 2020, granted, now 10,811,100, issued on Oct. 20, 2020.
Application 16/856,679 is a continuation of application No. 16/719,585, filed on Dec. 18, 2019, granted, now 10,672,482, issued on Jun. 2, 2020.
Application 16/719,585 is a continuation of application No. 16/556,058, filed on Aug. 29, 2019, granted, now 10,553,287, issued on Feb. 4, 2020.
Application 16/556,058 is a continuation of application No. 16/238,390, filed on Jan. 2, 2019, granted, now 10,403,370, issued on Sep. 3, 2019.
Application 16/238,390 is a continuation of application No. 15/936,214, filed on Mar. 26, 2018, granted, now 10,186,319, issued on Jan. 22, 2019.
Application 15/936,214 is a continuation of application No. 15/790,494, filed on Oct. 23, 2017, granted, now 9,928,916, issued on Mar. 27, 2018.
Application 15/790,494 is a continuation of application No. 15/444,274, filed on Feb. 27, 2017, granted, now 9,818,487, issued on Nov. 14, 2017.
Application 15/444,274 is a continuation of application No. 15/201,108, filed on Jul. 1, 2016, granted, now 9,627,080, issued on Apr. 18, 2017.
Application 15/201,108 is a continuation of application No. 14/833,515, filed on Aug. 24, 2015, granted, now 9,412,458, issued on Aug. 9, 2016.
Application 14/833,515 is a continuation of application No. 14/686,694, filed on Apr. 14, 2015, granted, now 9,147,494, issued on Sep. 29, 2015.
Application 14/686,694 is a continuation of application No. 13/791,726, filed on Mar. 8, 2013, granted, now 9,025,378, issued on May 5, 2015.
Claims priority of application No. 2012-196396 (JP), filed on Sep. 6, 2012.
Prior Publication US 2024/0296893 A1, Sep. 5, 2024
Int. Cl. G11C 16/16 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 16/06 (2006.01); G11C 16/08 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/16 (2013.01) [G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); G11C 16/26 (2013.01); G11C 16/3445 (2013.01); G11C 16/06 (2013.01); G11C 16/08 (2013.01); G11C 16/10 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a memory block including a first memory string and a second memory string, the first memory string including a first transistor, a second transistor and a first memory cell, the second memory string including a third transistor, a fourth transistor and a second memory cell;
a bit line connected to a node of the first transistor and a node of the third transistor;
a first select gate line connected to a gate of the first transistor;
a second select gate line connected to a gate of the third transistor;
a word line connected to a gate of the first memory cell and a gate of the second memory cell; and
a controller coupled to the memory block, the controller configured to, during a time period for erase verify operations on the first memory string and the second memory string:
apply a selection voltage to the first select gate line or the second select gate line to discharge the first select gate line or the second select gate line to which the selection voltage is applied, and
apply an erase verify voltage to the word line and discharge the word line,
wherein, during the time period for the erase verify operations, a total number of times the first select gate line and the second select gate line are discharged is larger than a number of times the word line is discharged.