US 12,283,323 B2
Memory device and method of operation with sequential discharging of word lines
Sung Kun Park, Icheon-si (KR); and Myoung Kwan Cho, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Aug. 17, 2022, as Appl. No. 17/889,970.
Claims priority of application No. 10-2022-0037659 (KR), filed on Mar. 25, 2022.
Prior Publication US 2023/0317168 A1, Oct. 5, 2023
Int. Cl. G11C 16/08 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/08 (2013.01) [G11C 16/0425 (2013.01); G11C 16/102 (2013.01); G11C 16/26 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory cell string including a plurality of memory cells respectively coupled to a plurality of word lines;
a peripheral circuit configured to perform an operation that applies an operating voltage to a selected word line, among the plurality of word lines, and applying a pass voltage to unselected word lines, among the plurality of word lines; and
an operation controller configured to control the peripheral circuit to perform, after the operation has been performed, a discharge operation that sequentially decreases voltages of the plurality of word lines in a direction from at least one central word line among the plurality of word lines to a first outermost word line adjacent to a first select line and in a direction from the at least one central word line to a second outermost word line adjacent to a second select line,
wherein threshold voltages of memory cells, among the plurality of memory cells, coupled to the first outermost word line and the second outermost word line, are higher than a threshold voltage of a memory cell, among the plurality of memory cells, coupled to the at least one central word line that is located in a central portion in relation to the memory cell string.