US 12,283,239 B2
Driving circuit, driving method and display device
Haigang Qing, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/005,955
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Jan. 13, 2022, PCT No. PCT/CN2022/071752
§ 371(c)(1), (2) Date Jan. 18, 2023,
PCT Pub. No. WO2023/133753, PCT Pub. Date Jul. 20, 2023.
Prior Publication US 2024/0249676 A1, Jul. 25, 2024
Int. Cl. G09G 3/3233 (2016.01); G09G 3/3266 (2016.01)
CPC G09G 3/3233 (2013.01) [G09G 3/3266 (2013.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0286 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A driving circuit, comprising a plurality of stages of scanning driving circuits and a plurality of rows of pixel driving circuits;
wherein at least one stage of scanning driving circuit includes a driving signal output terminal, and the driving signal output terminal is electrically connected to at least three adjacent rows of pixel driving circuits in the plurality of rows of pixel driving circuits, and is configured to provide a compensation control signal, a data writing-in control signal and a reset control signal to the at least three adjacent rows of pixel driving circuits;
wherein the driving circuit includes N+2 stages of scanning driving circuits and N rows of pixel driving circuits; N is an integer greater than 1;
an nth stage of driving signal output terminal of an nth stage of scanning driving circuit included in the driving circuit is respectively electrically connected to an (n−2)th row of pixel driving circuit, an (n−1)th row of pixel driving circuit and an nth row of pixel driving circuit, the nth stage of scanning driving circuit is configured to provide the compensation control signal to the (n−2)th row of pixel driving circuit, provide the data writing-in control signal to the (n−1)th row of pixel driving circuit and provide the reset control signal to the nth row of pixel driving circuit through the nth stage of driving signal output terminal;
n is a positive integer, n is greater than 2, and n is less than N+1;
wherein, a first stage of driving signal output terminal of a first stage of scanning driving circuit included in the driving circuit is electrically connected to a first row of pixel driving circuit, and the first stage of scanning driving circuit is configured to providing the reset control signal to the first row of pixel driving circuit through the first stage of driving signal output terminal;
an (N+2)th stage of driving signal output terminal of an (N+2)th stage of scanning driving circuit included in the driving circuit is electrically connected to the Nth row of pixel driving circuit, and the (N+2)th stage of scanning driving circuit is configured to provide the compensation control signal to the Nth row of pixel driving circuit through the (N+2)th stage of driving signal output terminal.