| CPC G06N 3/063 (2013.01) [G06F 7/501 (2013.01); G06F 7/5318 (2013.01); G06F 9/5027 (2013.01); G06F 9/52 (2013.01); G06F 9/544 (2013.01)] | 52 Claims |

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1. An artificial intelligence (AI) accelerator comprising:
memory circuits configured to output weight data and vector data;
a multiplication circuit/adder tree configured to perform a multiplying/adding calculation on the weight data and the vector data to generate and output multiplication/addition result data;
a left accumulator synchronized with an odd clock signal to perform an accumulative adding calculation on odd-numbered multiplication/addition result data of the multiplication/addition result data and a left latched data; and
a right accumulator synchronized with an even clock signal to perform an accumulative adding calculation on even-numbered multiplication/addition result data of the multiplication/addition result data and a right latched data.
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