US 12,282,725 B2
Enhanced alignment for global placement in a circuit
Alexey Y Lvov, Congers, NY (US); Gi-Joon Nam, Chappaqua, NY (US); Benjamin Neil Trombley, Hopewell Junction, NY (US); Lakshmi N Reddy, Mount Kisco, NY (US); and Paul G Villarrubia, Austin, TX (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on May 25, 2022, as Appl. No. 17/804,070.
Prior Publication US 2023/0385503 A1, Nov. 30, 2023
Int. Cl. G06F 30/392 (2020.01); G06F 30/27 (2020.01)
CPC G06F 30/392 (2020.01) [G06F 30/27 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method for providing enhanced initial global placement in a circuit design in a computing environment by one or more processors comprising:
determining a wire length minimization based on maximum population density constraints as a single player game theory for global placement of an integrated circuit.