US 12,282,723 B2
Standard cell characterization for internal conductive line of cell
Shi-Han Zhang, Hsinchu (TW); You-Cheng Lai, Hsinchu (TW); Jerry Chang Jui Kao, Taipei (TW); Pei-Wei Liao, Hsinchu (TW); Shang-Chih Hsieh, Taoyuan County (TW); Meng-Kai Hsu, Hsinchu County (TW); and Chih-Wei Chang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed on Feb. 15, 2022, as Appl. No. 17/671,979.
Prior Publication US 2023/0259680 A1, Aug. 17, 2023
Int. Cl. G06F 30/3312 (2020.01); G03F 1/70 (2012.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 119/12 (2020.01)
CPC G06F 30/3312 (2020.01) [G03F 1/70 (2013.01); G06F 30/392 (2020.01); G06F 30/394 (2020.01); G06F 2119/12 (2020.01)] 20 Claims
OG exemplary drawing
 
1. A method, performed by at least one processor, comprising:
providing a design data of an integrated circuit (IC), the design data comprising a first cell;
identifying a first conductive line in the first cell as a critical internal net of the first cell, wherein the first conductive line is electrically connected between an input terminal of the first cell and an output terminal of the first cell, wherein the first conductive line includes a portion falling on a peripheral region of the first cell from a top-view perspective;
providing a library of the first cell, wherein the library includes a table of timing parameters or power parameters of the first cell based on a multidimensional input set associated with the critical internal net;
updating the design data by determining a timing or power value of the first cell based on the table;
performing a timing analysis on the updated design data; and
forming a photomask based on the updated design data in response to determining that the timing analysis of the updated design data complies with a specification.