US 12,282,681 B2
Balancing power, endurance and latency in a ferroelectric memory
Jon D. Trantham, Chanhassen, MN (US); Praveen Viraraghavan, Chicago, IL (US); John W. Dykes, Eden Prairie, MN (US); Ian J. Gilbert, Chanhassen, MN (US); Sangita Shreedharan Kalarickal, Eden Prairie, MN (US); Matthew J. Totin, Excelsior, MN (US); Mohamad El-Batal, Superior, CO (US); and Darshana H. Mehta, Shakopee, MN (US)
Assigned to SEAGATE TECHNOLOGY LLC, Fremont, CA (US)
Filed by Seagate Technology LLC, Fremont, CA (US)
Filed on Jun. 15, 2022, as Appl. No. 17/841,083.
Claims priority of provisional application 63/211,821, filed on Jun. 17, 2021.
Prior Publication US 2022/0405003 A1, Dec. 22, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0653 (2013.01) [G06F 3/0611 (2013.01); G06F 3/0619 (2013.01); G06F 3/0625 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
receiving a data set for storage to a non-volatile memory (NVM) comprising an array of ferroelectric memory cells (FMEs); and
programming the data set to a group of the FMEs at a target location in the NVM using a selected profile to balance power, endurance and latency associated with the data set, the selected profile retrieved from a memory that stores an additional number of different profiles for the group of the FMEs at the target location for different combinations of power, endurance and latency,
wherein the selected profile is selected from a plurality of profiles stored in a local memory, each of the plurality of profiles associated with a different physical location within the NVM, and
wherein different profiles are applied to program the data based on different location of the FME on the NVM, such that a first profile applied to program the data for the FME incorporated in a main memory is different than a second profile applied to program the data for the FME incorporated in a cache memory.