| CPC G06F 12/0862 (2013.01) [G06F 12/0811 (2013.01); G06F 2212/6024 (2013.01)] | 27 Claims |

|
1. A method comprising:
operating a plurality of hardware pre-fetchers to pre-fetch data in a memory hierarchy that includes a main memory and two or more caches between the main memory and a processor core, each hardware pre-fetcher coupled to each of the two or more caches to apply a different pre-fetching scheme to the two or more caches;
arbitrating requests from each of the plurality of hardware pre-fetchers;
buffering pre-fetch requests from each of the plurality of hardware pre-fetchers in a buffer;
calculating changes in one or more performance metrics over two or more sampling intervals; and
controlling the plurality of hardware pre-fetchers in response to a change in the one or more performance metrics between at least a first sampling interval and a second sampling interval.
|