US 12,282,401 B2
Controller, storage device and test system
Seung Hwa Baek, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on May 16, 2023, as Appl. No. 18/318,655.
Claims priority of application No. 10-2023-0008424 (KR), filed on Jan. 20, 2023.
Prior Publication US 2024/0248823 A1, Jul. 25, 2024
Int. Cl. G06F 11/263 (2006.01); G06F 11/07 (2006.01); G06F 11/14 (2006.01); G06F 11/27 (2006.01); G06F 12/00 (2006.01); G06F 12/02 (2006.01); G06F 12/0831 (2016.01); G06F 13/16 (2006.01); G06F 15/78 (2006.01)
CPC G06F 11/2635 (2013.01) [G06F 11/073 (2013.01); G06F 11/141 (2013.01); G06F 11/27 (2013.01); G06F 12/00 (2013.01); G06F 12/0238 (2013.01); G06F 12/0835 (2013.01); G06F 13/1668 (2013.01); G06F 15/7839 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A test system device comprising:
a first storage device, operating in a host mode, including a first buffer memory and a first processor configured to create and store a command unit to test performance of a second storage device in the first buffer memory and to transmit the command unit to the second storage device, and configured to read and process a test input data unit received from the second storage device and stored in the first buffer memory; and
the second storage device, operating in a device mode, including a second buffer memory and a second processor configured to read and process the command unit received from the first storage device and stored in the second buffer memory and configured to create and store the test input data unit corresponding to the command unit in the second buffer memory and to transmit the test input data unit to the first storage device,
wherein the first storage device processes the test input data unit to check the performance of the second storage device.