| CPC G02F 1/133707 (2013.01) [G02F 1/134345 (2021.01); G02F 1/136286 (2013.01); G02F 1/13394 (2013.01); G02F 1/134309 (2013.01); G02F 1/1368 (2013.01)] | 16 Claims |
|
1. An array substrate, wherein the array substrate comprises:
a first substrate having:
a plurality of sub-pixel regions arranged in an array along a row direction and a column direction;
first wiring regions each of which is located between two adjacent rows of the sub-pixel regions; and
second wiring regions each of which is located between two adjacent columns, wherein there is an overlap between the first wiring regions and the second wiring regions;
a plurality of sub-pixel units formed on the first substrate, wherein each of the sub-pixel units comprises a pixel electrode at least partially located in a corresponding one of the sub-pixel regions, a common electrode, and a transistor at least partially located in a corresponding one of the first wiring regions, the transistor comprises a gate electrode, a first electrode, and a second electrode, the pixel electrode is connected to the first electrode, an orthographic projection of the common electrode on the first substrate overlaps an orthographic projection of the pixel electrode on the first substrate, the row direction is the second direction, and the column direction is the first direction;
a plurality of rows of scan lines formed on the first substrate, wherein at least one row of scan line is located in one of the first wiring regions, and the one row of scan line is connected to the gate electrode and is configured to provide a scan signal to a corresponding one of the sub-pixel units,
a plurality of rows of common lines formed on the first substrate, wherein at least one row of common line is located in one of the first wiring regions, and the one row of common line is connected to the common electrode and is configured to provide a common signal to a corresponding one of the sub-pixel units; and
a plurality of columns of data lines formed on the first substrate, wherein at least one column of data line is located in one of the second wiring regions, and the one column data line is connected to the second electrode and is configured to provide a data signal to a corresponding one of the sub-pixel units;
wherein an orthographic projection of each of the scan lines on the first substrate and an orthographic projection of each of the common lines on the first substrate do not overlap, an orthographic projection of each of the data lines on the first substrate overlaps the orthographic projection of each of the scan lines on the first substrate and the orthographic projection of each of the common lines on the first substrate;
wherein at least one of the pixel electrode and the common electrode is of an electrode structure, and the electrode structure comprises:
a first electrode portion comprising a first connection bar extending in a first direction and a plurality of first electrode bars arranged at intervals in the first direction, wherein the first connection bar has a first side and a second side which are opposite in a second direction, the plurality of first electrode bars are located on the first side of the first connection bar and connected to the first connection bar, and ends of adjacent first electrode bars away from the first connection bar are in an open shape;
a second electrode portion spaced apart from the first electrode portion in the first direction, wherein the second electrode portion comprises a second connection bar extending in the first direction and a plurality of second electrode bars arranged at intervals in the first direction, the second connection bar is located at a position on the first side away from the second side, the second connection bar has a third side and a fourth side which are opposite in the second direction, the third side is located at a position on the fourth side close to the first side, the plurality of second electrode bars are located on the third side of the second connection bar and connected to the second connection bar, and ends of adjacent second electrode bars away from the second connection bar are in an open shape; and
a conductive connection portion arranged between the first electrode portion and the second electrode portion, wherein both ends of the conductive connection portion are connected to the first connection bar and the second connection bar, respectively, and an area of the conductive connection portion is larger than an area of each of the first electrode bars and an area of each of the second electrode bars;
wherein the first direction and the second direction are perpendicular to each other;
wherein no common line is provided in each of the sub-pixel regions;
wherein the common electrode is located on a side of the pixel electrode away from the first substrate, and the common electrode is the electrode structure:
wherein:
the first electrode portion further comprises a signal connection bar which is located on the first side of the first connection bar and connected to the first connection bar and is located on a side of the plurality of first electrode bars away from the conductive connection portion;
the signal connection bar of the common electrode is located in a corresponding one of the first wiring regions;
the common electrode is located on a side of a corresponding one of the common lines away from the first substrate, and the signal connection bar is connected to the corresponding one of the common lines through a first via structure;
the corresponding one of the common lines has a first segment located outside a corresponding one of the second wiring regions and inside the corresponding one of the first wiring regions, the first segment has a first portion, a second portion and a third portion that are sequentially arranged in the row direction, a side of the third portion away from a corresponding scan line is farther away from the scan line than a side of the first portion away from the scan line, and a side of the second portion away from the scan line is closer to the scan line than the side of the first portion away from the scan line, and a notch is formed between the side of the second portion away from the scan line and the first portion and the third portion;
a part of an orthographic projection of the first via structure on the first substrate overlaps an orthographic projection of the second portion and an orthographic projection of the third portion on the first substrate, and another part of the orthographic projection of the first via structure on the first substrate overlaps an orthographic projection of the notch on the first substrate;
a distance between a boundary line of the first via structure and a boundary line of the third portion in the column direction is a third distance;
a distance between a boundary line of the first via structure and a boundary line of the third portion away from the second portion in the row direction is a fourth distance;
a distance between a boundary line of the first via structure and a boundary line of the second portion away from the third portion in the row direction is a fifth distance; and
a ratio of each of the third distance, the fourth distance, and the fifth distance to the first width of each of the first electrode bars is 1 to 6.
|