US 11,963,360 B2
Semiconductor device
Shunpei Yamazaki, Setagaya (JP); Tomoaki Atsumi, Hadano (JP); and Yuta Endo, Atsugi (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed on Apr. 21, 2021, as Appl. No. 17/236,115.
Application 17/236,115 is a continuation of application No. 15/159,021, filed on May 19, 2016, abandoned.
Claims priority of application No. 2015-106145 (JP), filed on May 26, 2015.
Prior Publication US 2021/0242220 A1, Aug. 5, 2021
Int. Cl. H01L 27/1157 (2017.01); G11C 16/04 (2006.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/40 (2023.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01)
CPC H10B 43/35 (2023.02) [G11C 16/0466 (2013.01); G11C 16/0483 (2013.01); H10B 43/27 (2023.02); H10B 43/40 (2023.02); G11C 16/10 (2013.01); G11C 16/26 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a first insulator;
a first conductor over the first insulator;
a second conductor over the first insulator;
an oxide semiconductor over and in contact with the first conductor and the second conductor;
a first gate insulator including a region facing a side of the oxide semiconductor;
a first gate electrode including a region facing the side of the oxide semiconductor with the first gate insulator therebetween;
a second gate insulator including a region facing the side of the oxide semiconductor;
a second gate electrode including a region facing the side of the oxide semiconductor with the second gate insulator therebetween;
a third conductor over and in contact with the oxide semiconductor;
a fourth conductor over and in contact with the oxide semiconductor; and
a fifth conductor over and in contact with the third conductor and the fourth conductor,
wherein the second gate electrode is over the first gate electrode.