CPC H03M 1/1255 (2013.01) [G06F 1/12 (2013.01); G06F 3/05 (2013.01); H03M 1/14 (2013.01); H03M 1/185 (2013.01)] | 20 Claims |
1. A signal processing chain of a data acquisition system, the signal processing chain including:
logic circuitry;
a data interface; and
an analog-to-digital converter (ADC) circuit configured to produce a digital output from an input signal and detect a specified signal feature of the input signal, and wherein the ADC circuit includes a clock generator circuit configured to provide an operating clock signal with a selectable frequency to one or both of the data interface and the logic circuitry, and change the frequency of the operating clock signal in response to detecting the signal feature of the input signal.
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