US 11,962,233 B2
Interface for passing control information over an isolation channel
Michael Robert May, Austin, TX (US); Fernando Naim Lavalle Aviles, Austin, TX (US); Carlos Jesus Briseno-Vidrios, Austin, TX (US); Patrick Johannus De Bakker, Hollis, NH (US); Gabor Marek, Bajna (HU); Charles Guo Lin, Austin, TX (US); Peter Onody, Budapest (HU); Tamas Marozsak, Budapest (HU); and Andras V. Horvath, Budapest (HU)
Assigned to Skyworks Solutions, Inc., Irvine, CA (US)
Filed by Skyworks Solutions, Inc., Irvine, CA (US)
Filed on May 1, 2023, as Appl. No. 18/141,911.
Application 18/141,911 is a continuation of application No. 18/093,282, filed on Jan. 4, 2023, abandoned.
Application 18/093,282 is a continuation of application No. 17/066,251, filed on Oct. 8, 2020, granted, now 11,575,305, issued on Feb. 7, 2023.
Prior Publication US 2023/0387782 A1, Nov. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H02M 1/08 (2006.01); H03K 17/18 (2006.01); H03K 17/68 (2006.01); H03K 17/689 (2006.01); H03K 17/691 (2006.01); H03K 17/567 (2006.01)
CPC H02M 1/08 (2013.01) [H03K 17/18 (2013.01); H03K 17/689 (2013.01); H03K 17/691 (2013.01); H03K 17/567 (2013.01); H03K 2217/0081 (2013.01)] 19 Claims
OG exemplary drawing
 
8. An isolated gate driver comprising:
a first voltage domain portion including a transmit circuit;
a second voltage domain portion including a receive circuit; and
an isolation communication channel between the first and second voltage domain portions, the first voltage domain portion configured to receive gate information and drive strength information, the transmit circuit configured to transmit a serial word in multiple bit times from the first voltage domain portion to the second voltage domain portion across the isolation communication channel, by modulating a signal during each respective bit time of the multiple bit times to represent both the gate information and the drive strength information, the gate information indicating a state of a gate control signal to control a device coupled to the second voltage domain portion of the isolated gate driver, the receive circuit including a demodulator circuit configured to demodulate the modulated signal transmitted across the isolation communication channel and a gate signal output circuit coupled to the demodulator circuit to supply the gate control signal based on the gate information and with a drive strength based on the drive strength information.