US 11,961,775 B2
Semiconductor devices and related methods
Gyu Wan Han, Incheon (KR); Won Bae Bang, Incheon (KR); Ju Hyung Lee, Gyeonggi-Do (KR); Min Hwa Chang, Incheon (KR); Dong Joo Park, Incheon (KR); Jin Young Khim, Seoul (KR); Jae Yun Kim, Incheon (KR); Se Hwan Hong, Seoul (KR); Seung Jae Yu, Incheon (KR); Shaun Bowers, Gilbert, AZ (US); Gi Tae Lim, Incheon (KR); Byoung Woo Cho, Seoul (KR); Myung Jea Choi, Incheon (KR); Seul Bee Lee, Gyeonggi-Do (KR); Sang Goo Kang, Seoul (KR); and Kyung Rok Park, Incheon (KR)
Assigned to Amkor Technology Singapore Holding Pte. Ltd., Singapore (SG)
Filed by Amkor Technology Singapore Holding Pte. Ltd., Singapore (SG)
Filed on Nov. 8, 2022, as Appl. No. 17/982,713.
Application 17/982,713 is a continuation of application No. 17/018,434, filed on Sep. 11, 2020, granted, now 11,495,505, issued on Nov. 8, 2022.
Application 17/018,434 is a continuation in part of application No. 16/429,553, filed on Jun. 3, 2019, granted, now 11,398,455, issued on Jul. 26, 2022.
Claims priority of provisional application 62/902,473, filed on Sep. 19, 2019.
Prior Publication US 2023/0070922 A1, Mar. 9, 2023
Int. Cl. H01L 23/48 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/52 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 29/40 (2006.01)
CPC H01L 23/13 (2013.01) [H01L 21/568 (2013.01); H01L 23/3185 (2013.01); H01L 23/49816 (2013.01); H01L 24/48 (2013.01); H01L 24/85 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/48157 (2013.01); H01L 2224/85005 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first module, comprising:
a first substrate comprising a first cavity and a first internal terminal;
a first device stack in the first cavity and comprising a plurality of electronic devices, wherein a first electronic device of the plurality of electronic devices comprises a first device terminal;
a first encapsulant in the first cavity and covering lateral sides of the plurality of electronic devices of the first device stack; and
a first internal interconnect in the first encapsulant and coupled with the first internal terminal and the first device terminal;
wherein:
the first substrate comprises a substrate shelf;
the first substrate comprises a substrate ledge portion and a substrate vertical portion extending from the substrate ledge portion, the substrate ledge portion including a ledge;
the substrate ledge portion defines a first width of the first cavity and the substrate vertical portion defines a second width of the first cavity greater than the first width of the first cavity; and
the substrate shelf comprises the ledge and the ledge includes the first internal terminal.