	US 11,961,734 B2
	Treatments to enhance material structures
Srinivas Gandikota, Santa Clara, CA (US); Yixiong Yang, San Jose, CA (US); Jacqueline Samantha Wrench, Santa Clara, CA (US); Yong Yang, Mountain View, CA (US); and Steven C. H. Hung, Sunnyvale, CA (US)
Assigned to Applied Materials, Inc., Santa Clara, CA (US)
Filed by Applied Materials, Inc., Santa Clara, CA (US)
Filed on Apr. 26, 2022, as Appl. No. 17/729,643.
Application 17/729,643 is a continuation of application No. 16/951,858, filed on Nov. 18, 2020, granted, now 11,417,517.
Application 16/951,858 is a continuation in part of application No. 16/403,312, filed on May 3, 2019, granted, now 10,872,763, issued on Dec. 22, 2020.
Prior Publication US 2022/0262629 A1, Aug. 18, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/67 (2006.01)

CPC H01L 21/02247 (2013.01) [H01L 21/02043 (2013.01); H01L 21/02274 (2013.01); H01L 21/28185 (2013.01); H01L 21/28202 (2013.01); H01L 21/67023 (2013.01); H01L 21/67207 (2013.01)]

10 Claims

1. A method of forming a metal gate structure, the method comprising:

forming a semiconductor structure formed on a substrate, comprising:

forming an interfacial layer on the substrate;

depositing a high-k gate dielectric layer on the interfacial layer;

depositing a high-K dielectric cap layer on the semiconductor structure;

performing a metal cap anneal process to harden and densify the high-K dielectric cap layer in a nitrogen (N₂) ambient;

depositing a sacrificial silicon cap layer on and in contact with the high-K dielectric cap layer;

performing a post cap anneal process layer in a nitrogen (N₂) ambient to harden and densify the deposited high-K dielectric cap layer and the sacrificial silicon cap layer;

removing the sacrificial silicon cap layer; and

depositing a metal layer.