US 11,961,220 B2
Handling integrated circuits in automated testing
Neeraj Bhardwaj, Karnataka (IN); Neha Vernekar, Karnataka (IN); Janardhan Venkata Raju, Bangalore (IN); Shubham Mehrotra, Karnataka (IN); Arun Adoni, Karnataka (IN); Mahit Arun Warhadpande, Karnataka (IN); Shimee Gupta, Bangalore (IN); Goda Devi Addanki, Bangalore (IN); Pavinkumar Ramasamy, Karnataka (IN); and Binoy Jose Maliakal, Karnataka (IN)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Mar. 19, 2018, as Appl. No. 15/925,008.
Claims priority of application No. 201841002708 (IN), filed on Jan. 23, 2018.
Prior Publication US 2019/0227117 A1, Jul. 25, 2019
Int. Cl. G01R 31/20 (2006.01); G01R 1/04 (2006.01); G01R 31/28 (2006.01); G06T 7/00 (2017.01)
CPC G06T 7/0008 (2013.01) [G01R 1/0441 (2013.01); G01R 31/2887 (2013.01); G01R 31/2893 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus for handling integrated circuits in automated testing, the apparatus comprising:
an upper assembly selectively translatable above a testing surface;
a lower bracket extending from and positioned below the upper assembly, wherein the lower bracket
extends in a plane of the testing surface,
forms a first opening, and
is selectively moveable perpendicular to the plane of the testing surface; and
a finger having a longitudinal axis extending downward from the upper assembly, wherein
a lower portion of the finger is selectively rotatable about the longitudinal axis,
a distal end of the finger extends downward toward the first opening in the lower bracket, and
the finger is selectively moveable upward and downward with respect to the lower bracket to pick up and place an integrated circuit in a socket.