CPC G06F 9/4825 (2013.01) [G06F 9/4812 (2013.01)] | 20 Claims |
1. A method for sending an interrupt signal between a first thread and a second thread, the method being executed by a peripheral component interconnect (PCI) device and comprising:
receiving, via a PCI bus, a notification message from a first processor in which a first thread is located, the notification message related to a virtual space address of the first thread to which a memory address of a memory mapped I/O (MMIO) memory of the PCI device is mapped;
generating an interrupt signal for a second thread in response to receiving the notification message;
configuring interrupt configuration information of the PCI device based on status information of the second thread that includes whether the second thread is running or a running status of the second thread, the configuring the interrupt configuration information including configuring an interrupt signal sending mechanism as sending the interrupt signal to a physical processor in a host kernel corresponding to a second processor in which the second thread is located in response to the second thread being assigned in a guest kernel and the second thread being not running and the second processor being a virtual processor, the physical processor being configured to wake up the virtual processor; and
sending the interrupt signal to the second processor in which the second thread is located based on the interrupt configuration information of the PCI device.
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