US 11,960,892 B2
Conditional execution specification of instructions using conditional extension slots in the same execute packet in a VLIW processor
Timothy David Anderson, University Park, TX (US); Duc Quang Bui, Grand Prairie, TX (US); and Joseph Raymond Michael Zbiciak, San Jose, CA (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Jul. 22, 2022, as Appl. No. 17/870,926.
Application 17/870,926 is a continuation of application No. 16/558,569, filed on Sep. 3, 2019, granted, now 11,397,583.
Application 16/558,569 is a continuation of application No. 14/920,298, filed on Oct. 22, 2015, granted, now 10,402,199, issued on Sep. 3, 2019.
Prior Publication US 2022/0357952 A1, Nov. 10, 2022
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/3802 (2013.01) [G06F 9/30072 (2013.01); G06F 9/30076 (2013.01); G06F 9/3013 (2013.01); G06F 9/30145 (2013.01); G06F 9/30185 (2013.01); G06F 9/3822 (2013.01); G06F 9/3853 (2013.01); G06F 9/3891 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A device comprising:
a register file;
a set of functional units coupled to the register file; and
an instruction decode unit coupled to the register file and to the set of functional units and configured to:
receive a packet that includes a set of instructions and a condition instruction, wherein the condition instruction includes a field for each functional unit of the set of functional units to specify, for each instruction of the set of instructions, a respective register of the register file; and
provide the set of instructions to the set of functional units;
wherein each of the set of functional units is configured to determine whether to execute a respective instruction of the set of instructions based on a value stored in the respective register of the register file specified by the condition instruction.